1. TECHNICAL FIELD
This invention relates generally to semiconductor memories, such as random access memories, and, more particularly, to a ferroelectric capacitor fabricated on a semiconductor wafer and a method for making same.
2. BACKGROUND OF THE RELATED ART
The use of semiconductor memories has grown dramatically since the 1970's. An ideal semiconductor memory would include desirable features such as: low cost per memory cell, high cell density, short access time, random access read and write cycles, low power consumption, nonvolatility, reliable operation over a wide temperature range, and a high degree of radiation hardness. While many types of semiconductor memories exhibit superior characteristics in one or more of these areas, no semiconductor memory is superior in every area.
For instance, read only memories (ROMs) are nonvolatile since they retain data even when they are not being powered. However, ROMs are typically preprogrammed and new data cannot be written into them. Programmable ROMs (PROMs) may be programmed by users, but they cannot be erased. Some types of ROMs can be programmed and erased with limited success. For instance, erasable PROMs (EPROMs) may be programmed electronically, but they must be exposed to ultraviolet light to erase the memory cells. Unfortunately, the exposure to the ultraviolet light erases all of the memory cells. The memory cells of an electrically erasable PROM (EEPROM) may be read and written electronically. Unfortunately, these memories are expensive, display a limited read and write endurance, and have relatively slow write access times.
Many random access memories (RAMs) are currently available. However, RAMs are volatile, and, thus, depend on external power to maintain the information stored in the memory. Dynamic random access memories (DRAMs), for instance, store information in the form of electrical charges on capacitors. Since each memory cell requires only one transistor and only one capacitor, many memory cells may be fabricated in a relatively small chip area. Static random access memories (SRAMs), on the other hand, utilize a transistor latch having at least two transistors in order to retain information in each memory cell. While SRAMs require little power, they consume a large amount of chip area relative to DRAMs.
Although they are volatile, random access memories display many of the previously listed preferred features such as low cost, high density, short access times, and random access read and write cycles. Therefore, computer designers prefer to store as much usable information as possible in RAMs, as opposed to other types of semiconductor memories or disk-type storage devices. As computers have become faster and more complex, the demand for high density RAMs has dramatically increased. Since DRAMs inherently require the smallest cell size, many memory manufacturers have turned their efforts toward packing as many DRAM cells as possible onto a chip.
Conventional DRAMs use silicon dioxide capacitors as storage capacitors. However, the limited charge density of the silicon dioxide capacitors prohibits further size reductions. Therefore, complex, three-dimensional processes have been used to maintain the size of the silicon dioxide capacitors while conserving chip area. For instance, a three-dimensional capacitor is formed by folding the capacitor into a trench or by stacking the capacitors to achieve adequate charge storage within an acceptable cell size. Since fabricating three-dimensional capacitors is much more expensive than fabricating planar capacitors, the resulting DRAMs are more expensive.
In an effort to overcome these deficiencies, designers have replaced the silicon dioxide capacitors of a conventional DRAM with ferroelectric thin-film capacitors. See H. Bogert, Research Newsletter, Dataquest Inc. (1988). Ferroelectric capacitors display an effective dielectric constant of about 1000 to 1500, as compared to a relatively low dielectric constant of about 4 to 7 for silicon dioxide capacitors. Assuming equal thickness of dielectric layers, the result of this increase in the dielectric constant is that the capacitance of the ferroelectric capacitor is approximately 250 times that of a silicon dioxide capacitor. However, typically the thickness of a ferroelectric dielectric layer is approximately 100-300 nanometers, and the thickness of a silicon dioxide dielectric layer is approximately 10-30 nanometers. Therefore, the capacitance of a typical ferroelectric capacitor is approximately 25-30 times that of a typical silicon dioxide capacitor. As a result, much smaller ferroelectric capacitors may be used in place of the silicon dioxide capacitors. The smaller ferroelectric capacitors can be fabricated using a planar process instead of the three-dimensional process used to manufacture high density silicon dioxide capacitors.
In addition to its ability to store a sufficient charge in a smaller area, a ferroelectric capacitor permanently retains charge after application of a voltage. The permanent charge originates from a net ionic displacement within the individual cells of the ferroelectric material. Typically, a ferroelectric cell takes the form of a crystal where atoms within the crystal change position in an electric field and retain this shift even after the electric field is removed. Since electronic circuits can read and write these crystals into one of two permanent states and then sense these states, ferroelectric capacitors are suitable for binary number storage where one crystal state represents a binary one, and the other crystal state represents a binary zero.
Many ferroelectric materials exhibit the same atomic structure as a regular perovskite crystal. A unit cell of a perovskite crystal has a general chemical formula of ABO.sub.3, where A is a large cation and B is a small cation. A perovskite crystal has a central metallic ion that is displaced into one of two positions along the axis of an applied electric field to create an electric dipole. The central ion remains polarized until an electric field is again applied to reverse it.
In a thin-film ferroelectric capacitor, the individual crystals or cells interact to produce domains within the material in response to a voltage being applied across the material. The voltage produces an electric field across the ferroelectric material and causes compensating charge to move through the material to the plates of the capacitor. After the voltage is removed, the majority of the domains remain polarized in the direction of the applied electric field, and compensating charge remains on the plates of the ferroelectric capacitor to maintain the polarization.
If a voltage is applied to the ferroelectric capacitor in the same direction as the previously applied voltage, some of the minority of domains, i.e., the remanent domains, polarize in the same direction as the majority of domains. Thus, only a small amount of compensating charge flows onto the capacitor plates. However, if the field is applied in the opposite direction, many domains switch their polarization. Therefore, a greater amount of charge flows onto the capacitor. For a more detailed discussion of ferroelectrics, see L. Cross & K. Hardtl, Encyclopedia of Semiconductor Technology, pp. 234-64, (Grayson, Martin ed. 1985).
To form a ferroelectric capacitor as part of an integrated circuit semiconductor chip, a film of ferroelectric material, usually less than a micrometer in thickness, is sandwiched between two metal electrodes. When properly deposited and annealed, the ferroelectric material exhibits the same atomic structure as the previously discussed perovskite crystal. Platinum is typically used for the electrodes, but the choice of the metal depends on the electrical qualities that best compliment the selected ferroelectric material. For instance, the structure of the metal must promote the formation of the proper ferroelectric phase.
Deposition of the ferroelectrics must be precisely controlled or the resulting crystal structure will not be uniform. Molecular-beam epitaxy and radio frequency sputtering have been used to apply the ferroelectric material with some success. However, difficulty arises in forming the interconnection between the bottom plate of the ferroelectric capacitor and the diffused region, e.g., the source or the drain, of the access transistor. Once the appropriate material of the capacitor plates is selected, the bottom plate is formed by depositing the metal onto the diffused region of the silicon wafer. The temperature is then raised briefly to about 650.degree. C. to ensure that the metal adheres well to the silicon.
Next, the ferroelectric material is deposited onto the bottom plate. Typically, the ferroelectric material is deposited at room temperature. Then, the ferroelectric material is annealed in the presence of oxygen by raising the temperature to between 500.degree. and 700.degree. C. At this temperature, the material is in a paraelectric phase, but, as the material cools, it enters the perovskite (ferroelectric) phase and becomes randomly polarized. The presence of oxygen during the anneal is important otherwise the proper ferroelectric phase will not form due to oxygen deficiency in the layer.
However, if the bottom plate is made from Platinum or a standard barrier metal, such as TiN, TiW or Ru.sub.2 O.sub.3, it will be adversely affected, particularly in the presence of oxygen, by the high temperatures required to form the perovskite phase in the ferroelectric material. During deposition of the ferroelectric material, the metal of the bottom plate interdiffuses with the diffused region of silicon so that a good ohmic contact, e.g., less than about 100 ohms, cannot be achieved without destroying the integrity of the structure and the switching properties of the ferroelectric capacitor.
The present invention is directed to overcoming or at least minimizing one or more of the problems mentioned above.